dual output digital multi - phase controller IR3566A august 9 , 2012 | final | product brief | v2.0 4 1 features ? dual output 6 + 1 phase pwm controller ? fully supports amd? svi1 & svi2 with dual ocp and intel ? vr12 & vr12.5 ? pvi and svi gpu vr modes ? overclocking & gaming mode ? switching frequency from 200khz to 2mhz per phase ? ir efficiency shaping features including dynamic phase control and automatic power state switching ? programmable 1 - phase or 2 - phase operation for light loads and active diode emulation for very light loads ? ir adaptive transient algorithm (ata) on both loops minimizes output bulk capacitors and system cost ? auto - phase detection with auto - compensation ? per - loop fault protection: ovp, uvp, ocp, otp ? i2c/smbus/pmbus system interface for telemetry of temperature, voltage, current & power for both loops ? multiple time programming (mtp) with integrated charge pump for easy custom configuration ? compatible with ir atl and 3.3v tri - state drivers ? +3.3v supply voltage; - 4 0 c to 85 c ambient operation ? pb - free, rohs , 6 x 6 mm , 48 - pin, 0.4mm pitch qfn basic application figure 1 : IR3566A basic application circuit description the IR3566A is a dual - loop digital multi - phase buck controller designed for cpu voltage regulation and is fully compliant with amd? svi1 & svi2 and intel ? vr12 & vr12.5 specifications. the IR3566A include s ir s efficiency shaping technology to deliver exceptional efficiency at minimum cost across the entire load range. ir variable gate drive optimizes the mosfet gate drive voltage based on real - time load current. ir s dynamic phase control adds/drops active phases based upon load current and can be configured to enter 1 - phase operation and dio de emulation mode automatically or by command. ir s unique adaptive transient algorithm (ata), based on proprietary non - linear digital pwm algorithms, minimizes output bulk capacitors and multiple time pr ogrammable (mtp) storage saves pins and enables a small package size. device configuration and fault parameters are easily defined using the ir digital power design center (dpdc ) gui and stored in on - chip mtp. the IR3566A provides extensive ovp, uvp, ocp a nd otp fault protection and includes thermistor based temperature sensing with vrhot signal . the IR3566A includes numerous features like register diagnostics for fast design cycles and platform differentiation, simplifying vrd design and enabling fastest time - to - market (ttm) with set - and - forget methodology. applications ? amd? svi1 & svi2, intel ? vr12 & vr12.5 based systems ? servers and high end desktop cpu vrs ? high performance graphics processors pin diagram figure 2 : IR3566A package top view p w m 1 1 2 v v o u t 1 i s e n 1 i r t n 1 3 . 3 v s v _ d i o e n a b l e e n a b l e s v _ c l k i r 3 5 6 6 a v r _ r d y _ l 1 s v _ a l e r t v r _ h o t # p w m 2 i s e n 2 i r t n 2 p w m 6 i s e n 6 i r t n 6 p o w e r s t a g e 6 . . . v c c p w m 1 _ l 2 i s e n 1 _ l 2 i r t n 1 _ l 2 p o w e r s t a g e 2 p o w e r s t a g e 1 v o u t 2 v r _ r d y _ l 2 v r _ r d y _ l 1 v r _ r d y _ l 2 v r _ h o t # s v _ d i o s v _ c l k s v _ a l e r t p o w e r s t a g e 7 2 3 2 1 2 4 2 2 p w m 1 _ l 2 v r t n r c s m v s e n v r d y 1 r c s p t s e n 1 p w m 3 v 1 8 a r r e s v c c p w m 2 p w m 1 r c s m _ l 2 r c s p _ l 2 e n _ l 2 / i n m o d e / p w r o k v r d y 2 v r t n _ l 2 v s e n _ l 2 1 2 7 8 5 6 3 4 1 0 9 3 4 3 3 2 8 2 7 3 0 2 9 3 2 3 1 2 5 2 6 4 9 g n d i r 3 5 6 6 a 4 8 p i n 6 x 6 q f n t o p v i e w 1 2 1 6 1 4 1 9 1 3 1 7 1 5 2 0 1 8 1 1 4 7 4 3 4 5 4 0 4 6 4 2 4 4 3 9 4 1 4 8 v r h o t _ c r i t # v i n s e n e n a d d r _ p r o t s m _ d i o s m _ c l k i r t n 1 i s e n 1 s v _ a l e r t # / s v t s v _ a d d r / v d d i o s m _ a l e r t # 3 6 3 5 p w m 4 3 8 3 7 i r t n 1 _ l 2 i s e n 1 _ l 2 p w m 5 p w m 6 v g d / t s e n 2 / v a u x s e n i r t n 6 i s e n 6 s v _ c l k / v i d s e l 1 s v _ d i o / v i d s e l 0 i r t n 2 i s e n 2 i r t n 3 i s e n 3 i r t n 4 i s e n 4 i r t n 5 i s e n 5
dual output digital multi - phase controller IR3566A august 9 , 2012 | final | product brief | v2.0 4 2 ordering information IR3566A m ? ? ? ? ? ? ? ? ? package packing qty part number programming qfn 3000 IR3566A mtr pbf d efault qfn 3000 IR3566A m xxyytr p 1 customer configuration notes: 1 . customer specific configuration file, where xx = customer id and yy = configuration file (codes assigned by ir marketing ) . figure 3 : IR3566A pin diagram enlarged p/pbf C lead free tr C tape & reel / ty - tray yy C configuration file id xx C customer id package type (qfn) 2 3 2 1 2 4 2 2 p w m 1 _ l 2 v r t n r c s m v s e n v r d y 1 r c s p t s e n 1 p w m 3 v 1 8 a r r e s v c c p w m 2 p w m 1 r c s m _ l 2 r c s p _ l 2 e n _ l 2 / i n m o d e / p w r o k v r d y 2 v r t n _ l 2 v s e n _ l 2 1 2 7 8 5 6 3 4 1 0 9 3 4 3 3 2 8 2 7 3 0 2 9 3 2 3 1 2 5 2 6 4 9 g n d i r 3 5 6 6 a 4 8 p i n 6 x 6 q f n t o p v i e w 1 2 1 6 1 4 1 9 1 3 1 7 1 5 2 0 1 8 1 1 4 7 4 3 4 5 4 0 4 6 4 2 4 4 3 9 4 1 4 8 v r h o t _ c r i t # v i n s e n e n a d d r _ p r o t s m _ d i o s m _ c l k i r t n 1 i s e n 1 s v _ a l e r t # / s v t s v _ a d d r / v d d i o s m _ a l e r t # 3 6 3 5 p w m 4 3 8 3 7 i r t n 1 _ l 2 i s e n 1 _ l 2 p w m 5 p w m 6 v g d / t s e n 2 / v a u x s e n i r t n 6 i s e n 6 s v _ c l k / v i d s e l 1 s v _ d i o / v i d s e l 0 i r t n 2 i s e n 2 i r t n 3 i s e n 3 i r t n 4 i s e n 4 i r t n 5 i s e n 5
dual output digital multi - phase controller IR3566A august 9 , 2012 | final | product brief | v2.0 4 3 typical application diagram figure 4 : dual - loop vr using IR3566A controller and chl85 1 5 mosfet d rivers in 4 + 1 configuration + 3 . 3 v v _ c p u _ l 1 i r 3 5 6 6 a v i n s e n p w m 4 p w m 1 _ l 2 p w m 3 p w m 2 p w m 1 i s e n 1 _ l 2 v r d y 1 v s e n v c c r r e s v 1 8 a v r t n i r t n 3 i s e n 4 i r t n 1 r c s p i r t n 2 r c s m i s e n 3 i s e n 2 i s e n 1 i r t n 4 + 1 2 v m a i n l o a d r c s c c s r s e r i e s r s e r i e s r t h r v i n _ 1 r v i n _ 2 i r t n 1 _ l 2 e n _ l 2 / i n m o d e / p w r o k t s e n 1 r t h 2 g n d h v c c l o g a t e h i g a t e v c c g n d p w m l v c c 1 2 v v b o o t s w i t c h v _ v g d v g d / v a u x s e n o p t i o n a l v a r i a b l e g a t e d r i v e c i r c u i t v _ c p u _ l 2 l o a d v r _ h o t _ i c r i t # s m _ c l k s m _ d i o i 2 c o r s m b u s v v r c s p _ l 2 r c s m _ l 2 r c s c c s r s e r i e s r s e r i e s r t h v s e n _ l 2 v r t n _ l 2 s v _ d i o s v _ c l k v v t o / f r o m c p u p w m 5 i s e n 5 i r t n 5 p w m 6 i s e n 6 i r t n 6 s m _ a l e r t # v a d d r _ p r o t 3 . 3 v h v c c l o g a t e h i g a t e v c c g n d p w m l v c c v b o o t s w i t c h v v _ v g d h v c c l o g a t e h i g a t e v c c g n d p w m l v c c 5 v v b o o t s w i t c h v v _ v g d h v c c l o g a t e h i g a t e v c c g n d p w m l v c c v b o o t s w i t c h v h v c c l o g a t e h i g a t e v c c g n d p w m l v c c v b o o t s w i t c h v h v c c l o g a t e h i g a t e v c c g n d p w m l v c c v b o o t s w i t c h v c h l 8 5 1 5 u n u s e d p h a s e s s v _ a l e r t # / s v t v r d y 2 e n 5 v v _ v g d v _ v g d 5 v v _ v g d 1 2 v 5 v 1 2 v c h l 8 5 1 5 c h l 8 5 1 5 c h l 8 5 1 5 c h l 8 5 1 5 c h l 8 5 1 5 1 2 v 1 2 v 5 v 1 2 v 5 v v r v i n _ 1 r v i n _ 2 + 5 v a u x o p t i o n a l 5 v s e n s e s v _ a d d r / v d d i o
dual output digital multi - phase controller IR3566A august 9 , 2012 | final | product brief | v2.0 4 4 data and specifications subject to change without notice. this product will be designed and qualified for the consumer market. qualification standards can be found on irs web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252 - 7105 tac fax: (310) 252 - 7903 visit us at www.irf.com for sales contact information . www.irf.com
|
